PCA_CPU partition with DC to xDX translation?
I just translated a DC schematic to xDx with the VX.1.1. translator.Some of my resistors are disconnected at one side and they look smaller and are off-grid.These resistors are related to a "CPA_CPU"...
View ArticleHow to assign power supply nets to planes ?
Hello all, there are two plane layers in my design. In Xpedition xPCB Layout, I have connected them to GND and 3.3v power supply nets. When I open "Edit Power- Supply Nets " window, it does not show me...
View ArticleImport Altium files to DxDesigner?
Hello, Is there a tutorial on how to import files from Altium Designer to DxDesigner? I am currently trying to import a project with multiple schematics. But, the Symbols and Schematic translator only...
View ArticleUsing bus ports with hierarchical or reuse blocks. How can we map nets...
Hello, When working with hierarchical blocks or reuse blocks, we have some issues with bus ports when instanciating multiple times the same block. For instance we have a reuse block with port...
View ArticleAccessing Design Fields from a Basic script in Logic
Hey guys and gals, I'm working on modifying the example Bill of Materials.bas script. All is going well except for accessing information in the Fields - Design dialog box (Fields... selection in the...
View ArticleCalibre PEX Extraction issue
Hi All, I have had no problems with the DRC and LVS. But when I run PEX, the extraction starts and ends with the following error without producing any output netlist....
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AATK 4.1 released
AATK_V4.1 is on SourceForge. If you have a problem that you can't fix on your own, give me an email and I will see what I can do. I didn't get everything but close! You can Download it from here:...
View ArticleCreo 2 - Mentor graphics - vesys interface
Hi All , I ma new to MG. I have been working for years on CREO 2, which is the CAD tool that we use. I have installed all plugins for CApital and they all work. I seem to have a problem linking the...
View ArticleJlink doesn't seem to be downloading to ATSAM3UEK
I'm working with the v1.0.0 realease of the ATSAM3UEK bsp but I don't think code is being downloaded to the board during debug. I'm using a Jlink to debug the Kernel Demo as a Nucleus application. The...
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Generating layer stackup in drill drawing in PADS Layout
The attached script generates graphical layer stackup in 2D libary, which shall be imported in drill drawing through Drafting Toolbar > From library command.Thanks for the Mentor team in writing...
View ArticleIs the PADS ES suite the same as PADS Standard Plus?
What are the difference between the PADS ES suite and the PADS Standard Plus suite? Looks like there is some additional functionality gained but also some is lost. (DxDPF). Why are paying customers...
View ArticleCreate Variant Manager report from a VBscript
I've recently began scripting for dxdesigner with vbs script, both of which are relatively new to me. I need to write a script that generates an excel report from the variant manager.This is not...
View ArticleConnectors not exported to Vesys from CREO
HI All Anyone encountered a problem when exporting an xml file from CREO to VEsys via the bridge. The harness appears with the correct length, but connectors are ommitted. Thanks Vinnesh
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Fatal Errors in HL 9.2
Hi all,I am experiencing following errors while working with HL 9.2 (64-bit and 32-bit). This happens whenever I tried to select a differential pair or during the model assignment.Could this be a bug...
View ArticleHow to import Eagle files to DxDesigner?
Hello all, I am trying to convert some Eagle files( .brd and .sch ) to DxDesigner? I want to modify these files in DxDesigner/Expedition 7.9.3 I have asked a similar question before on this forum but...
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SI simulation differs with real measurement a lot
Hi Sir, I am a beginner of Hyperlynx, try to do SI simulation as a reference for my next version of PCB design. On my current PCB, there are 64 LVDS interfaces, all running at maximum 960Mbps, from...
View ArticleHow to create Mentor keyin netlist from Orcad 16.6
I am using Orcad 16.6 schematic and Expedition layout 2007.9.3 Version. I want to create mentor keyin netlist from Orcad.
View ArticleFiltering a component collection
Hello, I'm working on a script to move assembly RefDes.To make my component collection I'm using this:Set cmpsColl = pcbDocObj.Components(epcbSelectAll)I want to unselect component with a specific Cell...
View ArticleCan Calibre do LVS for a Cadence design with mixed schematic view and CDL...
I need to use Calibre to LVS a Cadence design with mixed schematic view and CDL netlist view. CDL netlist is from a third-party design and cannot be translated into Cadence database by CDLIN since it...
View ArticleChange value of "Global Signal Name" on user global
We have several global symbols with Global Signal Names like USER_GND, USER_V, and so on. I would like to place them programmatically and then change the value to the name of a power net, such as +5V,...
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