How to import verilog to pyxis schmeatic

hi everyone,

I want to ask about import verilog file into pyxis schematic. When I try to import pyxis need map file, what is map file?. Because I dont have map file just verilog file,

is theresomeonewhocanhelpme?

I use : pyxis v10.2, design kit :HK_C35, and calibre : 2012.2_17

thanks